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NCP1526 400 mA, 1.2 V, High-Efficiency, Step-Down Converter with Low Noise Voltage Regulator Optimized for RF Module
The NCP1526 product is a monolithic integrated circuit combining step-down PWM DC-DC converter dedicated to the portable applications powered from one cell Li-ion or three cell Alkaline/ NiCd/NiMH batteries and a low noise output voltage regulator dedicated to supply RF sensitive module in the portable applications. The DC-DC converter operates with a fixed output voltage of 1.2 V and delivers up to 400 mA. It uses synchronous rectification to increase efficiency and reduces external part count. The device also has a built-in 3.0 MHz (nominal) oscillator which reduces component size by allowing small inductor and capacitors. It includes an integrated soft-start, cycle-by-cycle current limiting, and thermal shutdown protection. The additional 2.80 V very low noise, low drop output regulator, is available with 150 mA current capability, current limitation and overtemperature protection. Finally, the NCP1526 is available in a space saving, ultra low profile 3x3 mm 10 pin UDFN package (thickness 0.55 mm max).
Features
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10 PIN DFN MU SUFFIX CASE 506AT 1526 A L Y W G 1526 ALYWG G
= Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
FB EN1 EN2 GND2 BYPASS (Top View) VIN1 LX GND1 VIN2 V1
* Step-Down Converter
*
* * * * * * * * * *
- Up to 85% Efficiency - Output Current Capability 400 mA - 3.0 MHz Switching Frequency - 1.2 V Fixed Output Voltage - Synchronous Rectification for Higher Efficiency LDO Regulator - 2.80 V Output Voltage - Up to 150 mA Output Current Capability - Very Low Noise: 45 mVRMS All Pins are Fully ESD Protected 2.7 V to 5.5 V Input Voltage Range Thermal Limit Protection 3.0 mm x 3.0 mm x 0.55 mm UDFN Package This is a Pb-Free Device Cellular Phones, Smart Phones and PDAs Digital Still Cameras MP3 Players and Portable Audio Systems Wireless and DSL Modems Portable Equipment
ORDERING INFORMATION
Device NCP1526MUTXG Package Shipping
UDFN-10 3000/T ape & Reel (Pb-Free)
Typical Applications
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2006
July, 2006 - Rev. 0
1
Publication Order Number: NCP1526/D
NCP1526
Vbattery C1 L1 Vout BUCK C3 Vout LDO C5
1 OFF ON OFF ON BUCK LDO 2 3 4 5 C4
FB EN1 EN2 GND2 BYPASS
VIN1 10 LX GND1 VIN2 V1 9 8 7 6
C2
Figure 1. Typical Applications Circuit
Vbattery FB ILIMIT 1 VIN1 REFERENCE VOLTAGE PWM CONTROL VIN1 OFF ON EN2 3 LOGIC CONTROL Buck Converter Q1 10 VIN1 4.7 mF Vout BUCK 1.20 V, 400 mA
OFF ON
EN1
2
9
LX
2.2 mH
4.7 mF Q2 8 GND1
VIN2 LOGIC CONTROL LDO Thermal Shutdown
GND2
4
7
VIN2
Vbattery
4.7 mF BYPASS 100 nF V1 BLOCK 5 6 V1 Vout LDO 2.80 V, 150 mA 1 mF
Figure 2. Simplified Block Diagram
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NCP1526
PIN FUNCTION DESCRIPTION (Pin out provided for concept purpose only and might change in the final product.)
Pin No. 1 2 3 4 5 Symbol FB EN1 EN2 GND2 BYPASS Function Analog Input Digital Input Digital Input Power Ground Description Feedback voltage from the output of the power supply. This is the input to the error amplifier. Enable for DC-DC converter. This pin is active high. It is turned off by logic LOW on this pin. Do not float this pin. EN2 enables the LDO.A HIGH level on this pin activates the voltage regulator. It is turned off by logic LOW on this pin. Do not float this pin. Ground connection for the LDO section and must be connected to the system ground. Bypass is the bandgap reference for the LDO. This pin requires a 100 nF bypass capacitor for low noise. This pin cannot be used for an external source. Output Power Power Input Power Ground Analog Output Power Input This pin provides the output voltage supplied by the LDO. This pin requires 1.0 mF decoupling capacitor. Input battery voltage to supply voltage regulator blocks. The pin requires a 4.7 mF decoupling capacitor. This pin is the GROUND reference for the DC-DC converter and the output control. The pin must be connected to the system ground. Connection from Power MOSFETs to the inductor. An output discharge circuit sinks current from this pin. Input battery voltage to supply the analog and digital blocks of the DC-DC converter. The pin must be decoupled to ground by a 4.7 mF ceramic capacitor.
6 7 8 9 10
V1 VIN2 GND1 LX VIN1
MAXIMUM RATINGS
Rating Minimum Voltage All Pins Maximum Voltage All Pins (Note 2) Maximum Voltage EN1, EN2, FB, LX UDFN10 Package (Note 5) Thermal Resistance, Junction-to-Air Operating Ambient Temperature Range Storage Temperature Range Junction Operating Temperature Latch-up Current Maximum Rating (TA = 85C) (Note 4) FB pin Latch-up Current Maximum Rating (TA = 85C) (Note 4) Other pins ESD Withstand Voltage (Note 3) Human Body Model Machine Model Symbol Vmin Vmax Vmax RqJA TA Tstg TJ Lu Vesd 2.0 200 kV V Value -0.3 7.0 VIN + 0.3 240 -40 to 85 -55 to 150 -40 to 125 "70 "100 Unit V V V C/W _C _C _C mA
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = 25C. 2. According to JEDEC standard JESD22-A108B. 3. This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM) per JEDEC standard: JESD22-A114. Machine Model (MM) per JEDEC standard: JESD22-A115. 4. Latchup current maximum rating per JEDEC standard: JESD78. 5. The exposed flag shall be connected to ground. 6. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J-STD-020A.
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NCP1526
ELECTRICAL CHARACTERISTICS, DC/DC Converter (Typical values are referenced to TA = +25C, Min and Max values are
referenced -40C to +85C ambient temperature, unless otherwise noted, operating conditions VIN = 3.6 V, unless otherwise noted.) Characteristic VIN1 PIN Input Voltage Range Quiescent Current, Iout = 0 mA, No Switching Quiescent Current, Iout = 0 mA, Oscillator Running Quiescent Current, EN Low Undervoltage Lockout (VIN Increase) Undervoltage Lockout Hysteresis EN1, EN2 PIN Positive Going Input High Voltage Threshold, EN0 Signal Negative Going Input High Voltage Threshold, EN0 Signal DC-DC CONVERTER SECTION Peak Inductor Current Feedback Voltage Threshold Overtemperature Load Transient Response, Rise/Fall Time 1.0 ms 1.0 mA to 300 mA Load Step 1.0 mA to 400 mA Load Step Line Transient Response, Iout = 100 mA, 3.0 V to 3.6 V Line Step Output Voltage Load Regulation Iout = 1.0 mA to 300 mA Iout = 1.0 mA to 400 mA Output Voltage Line Regulation, Iout = 100 mA, VIN = 2.7 V to 5.2 V Output Voltage Ripple, Iout = 300 mA Oscillator Frequency P-Ch On-Resistance N-Ch On-Resistance P-Ch Leakage Current N-Ch Leakage Current Soft-Start Time 9 1 - ILIM VFB VOUT - 1.164 - - - - - - - 2.4 - - - - - 1000 1.2 30 35 "5.0 0.2 0.5 0.1 5.0 3.0 400 400 0.05 0.01 100 - 1.236 mV - - - - - - - 3.6 - - - - 300 % mV MHz mW mW mA mA ms mVpp % mA V 2, 3 2, 3 VIH VIL 1.2 - - - - 0.4 V V 10 8 8 10 10 Vin Iq ON Iq OFF VUVLO VHUVLO 2.7 - - - - - - 250 550 0.2 2.5 100 5.2 350 - 1.5 - - V mA mA V mV Pin Symbol Min Typ Max Unit
- -
VOUT VOUT
- - 9 1 1 1 1 -
VOUT VOUT FOSC RLxH RLxL ILeakH ILeakL Tstart
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NCP1526
ELECTRICAL CHARACTERISTICS for LDO (Typical values are referenced to TA = +25C, Min and Max values are referenced
-40C to +85C ambient temperature, unless otherwise noted, operating conditions 3 V < VIN < 5.2 V, unless otherwise noted.) Characteristic VIN2 PIN Input Voltage Range Quiescent Current On State VIN2 = 4.2 V, Iout = 0 mA Quiescent Current Off State LDO SECTION Output Voltage, Iout = 0 mA to 150 mA Maximum Output Current Output Voltage Line Regulation, Iout = 10 mA Load Regulation, Iout = 1.0 mA to 150 mA, VIN = 3.6 V Power Supply Ripple Rejection on V1, (0.2 Vp-p), Cout = 1.0 mF, Vin = 3.6 V 1.0 kHz Iout1 = 100 mA 100 kHz, Iout1 = 100 mA Dropout Voltage, Iout = 150 mA Output Short Circuit Current Output Noise Voltage, 100 Hz to 100 kHz, Iout = 10 mA, Cout= 1.0 mF Turn ON Output Voltage, Vin = 3.6 V BYPASS PIN Output Voltage, Cby = 100 nF 5 VBY - 1.5 - V 6 6 6 6 6 6 6 6 V1 Iout V1 V1 PSRR - - VINA-V1 ISC VN Ton - 250 - - 67 45 - 300 45 80 - - 150 - - 150 mV mA mVrms ms 2.716 150 - - 2.80 - 10 20 2.884 - - - V mA mV mV dB 7 4 4 Vin Iq ON Iq OFF 3 - - - 70 0.2 5.2 95 - V mA mA Pin Symbol Min Typ Max Unit
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NCP1526
TYPICAL CHARACTERISTICS
NCP1526 circuit on Figure 2, Vin = 3.6 V, TA = 25C, unless otherwise noted 100 STEP DOWN CONVERTER EFFICIENCY (%) 90 80 70 60 50 40 30 0 100 200 300 400 Vin = 2.7 V Vin = 3.6 V Vin = 5.2 V 100 STEP DOWN CONVERTER EFFICIENCY (%) 90 80 70 60 50 40 30 0 100 200 Iout (mA) STEP DOWN CONVERTER OUTPUT VOLTAGE (V) 300 400 TA = 25C TA = -40C
TA = 85C
Iout, OUTPUT CURRENT (mA)
Figure 3. Step Down Converter Efficiency vs. Output Current
3.0 STEP DOWN CONVERTER LOAD REGULATION (%) 2.0 1.0 0 -1.0 -2.0 -3.0 TA = 25C TA = -40C TA = 85C
Figure 4. Step Down Converter Efficiency vs. Temperature Vin = 3.6 V
1.225
1.215
Vin = 2.7 V Vin = 3.6 V
1.205 Vin = 5.2 V 1.195 -50
0
100
200 Iout (mA)
300
400
-25
0
25
50
75
100
125
TEMPERATURE (C)
Figure 5. Step Down Converter Load Regulation vs. Temperature Vin = 3.6 V
5.0 FREQUENCY VARIATION (%) 4.0 3.0 1.0 0 -1.0 -2.0 -3.0 -4.0 -5.0 2.7 3.2 3.7 4.2 4.7 5.2 EFFICIENCY (%) 2.0 Iout = 100 mA 100 90 80 70 60 50 40 30
Figure 6. Step Down Converter Output Voltage vs. Temperature at Iout = 100 mA
TA = -40C TA = 25C
TA = 85C
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Vin, INPUT VOLTAGE (V)
Vin, INPUT VOLTAGE (V)
Figure 7. Step Down Converter Switching Frequency vs. Input Voltage
Figure 8. Step Down Converter Efficiency vs. Input Voltage at Iout = 100 mA
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NCP1526
TYPICAL CHARACTERISTICS
NCP1526 circuit on Figure 2, Vin = 3.6 V, TA = 25C, unless otherwise noted 2.0 1.0
LINE REGULATION (%)
1.0
LINE REGULATION (%)
Iout = 400 mA Iout = 100 mA Iout = 0.1 mA
0.5 TA = -40C 0 TA = 25C -0.5 TA = 85C
0
-1.0
-2.0
2.7
3.2
3.7 Vin, (V)
4.2
4.7
5.2
-1.0
2.7
3.2
3.7 Vin (V)
4.2
4.7
5.2
Figure 9. Step Down Converter Line Regulation vs. Output Current
Figure 10. Step Down Converter Line Regulation vs. Temperature at Iout = 100 mA
VEN 1 V / Div
Iout 200 mA / Div
Vout 500 mV / Div 20 ms / Div
Vout 20 mV / Div
40 ms / Div
Figure 11. Step Down Converter Soft Start Time
Figure 12. Step Down Converter Load Transient Response
VLX 2 V / Div Vin 2 V / Div Vout 10 mV / Div 10 ms / Div Iout 200 mA / Div 100 ms / Div Vin 200 mV / Div Vout 10 mV / Div
Figure 13. Step Down Converter PWM Mode of Operation
Figure 14. Step Down Converter Line Transient Response
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NCP1526
TYPICAL CHARACTERISTICS
NCP1526 circuit on Figure 2, Vin = 3.6 V, TA = 25C, unless otherwise noted 1.0 0.6 0.2 -0.2 -0.6 -1.0 Vin = 2.7 V Vin = 5.2 V Vin = 3.6 V 1.0 0.5 TA = 25C TA = 85C
LOAD REGULATION (%)
LOAD REGULATION (%)
0 -0.5
TA = -40C
0
50
100
150
-1.0
0
30
60 Iout, (mA)
90
120
150
Iout, OUTPUT CURRENT (mA)
Figure 15. LDO Load Regulation
Figure 16. LDO Load Regulation vs. Temperature
Vout 1 V / Div
Iout 200 mA / Div
EN 2 V / Div 100 ms / Div
Vout 20 mV / Div
10 ms / Div
Figure 17. LDO Turn On Time from Enable
100 QUIESCENT CURRENT (mA) 90 NOISE (mV/Hz) 1,000 80 70 60 50 10 10,000
Figure 18. LDO Load Transient Response
Band Power 100 Hz to 100 KHz: 17 mVrms
100
3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 Vin (V)
5.0 5.2
100
1,000
10,000
100,000
FREQUENCY (Hz)
Figure 19. LDO Quiescent Current vs. Input Voltage
Figure 20. LDO Noise (DC/DC Converter Off)
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NCP1526
TYPICAL CHARACTERISTICS
NCP1526 circuit on Figure 2, Vin = 3.6 V, TA = 25C, unless otherwise noted 1,000 100 90 80 NOISE (mV/Hz) 100 DROPOUT (mV) 70 60 50 40 30 20 10 0 TA = 85C TA = 25C TA = -40C
10 Band Power 100 Hz to 100 KHz: 27 mVrms 1.0 100 1,000 10,000 100,000
0
30
60 Iout, (mA)
90
120
150
FREQUENCY (Hz)
Figure 21. LDO Noise (DC/DC Converter On)
20 10 0 -10 GAIN (dB) -20 -30 -40 -50 -60 -70 -80 -90
Figure 22. LDO Dropout Voltage vs. Output Current
10
100
1,000 (Hz)
10,000
100,000
1,000,000
Figure 23. LDO PSRR at Iout = 100 mA, Vin = 3.6 V
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NCP1526
DC-DC OPERATION DESCRIPTION Detailed Description The NCP1526 uses a constant frequency, voltage mode step-down architecture. Both the main (P-Channel MOSFET) and synchronous (N-Channel MOSFET) switches are internal. It delivers a constant voltage from either a single Li-Ion or three cell NiMH/NiCd battery to portable devices such as cell phones and PDA. The output voltage accuracy is well within 3% of the 1.20 V. The NCP1526 can source at least 400 mA.
PWM Operating Mode
The output voltage of NCP1526 is regulated by modulating the on-time pulse width of the main switch Q1
3.6040 3.6000 3.5960 400 m 200 m 0.00 400 m 300 m 200 m 400 m 100 m -200 m 1.205 1.200 1.195 3.70 1.35 -1.00 Vin
at a fixed 3.0 MHz frequency. The switching of the PMOS Q1 is controlled by a flip-flop driven by the internal oscillator and a comparator that compares the error signal from an error amplifier with the PWM ramp. At the beginning of each cycle, the main switch Q1 is turned ON by the rising edge of the internal oscillator clock. When the PWM ramp becomes higher than the error voltage amplifier the PWM comparator resets the flip-flop, Q1 is turned OFF and the synchronous switch Q2 is turned ON. Q2 replaces the external Schottky diode to reduce the conduction loss and improve the efficiency. To avoid overall power loss, a certain amount of dead time is introduced to ensure Q1 is completely turned OFF before Q2 is being turned ON.
IPFET
IL
INFET
VO
VLX
Figure 24. Waveforms During PWM Operation Soft-Start Cycle-by-Cycle Current Limitation
The NCP1526 uses soft-start to limit the inrush current when the device is initially powered up or enabled. Soft-start is implemented by gradually increasing the reference voltage until it reaches the full reference voltage. During startup, a pulsed current source charges the internal soft-start capacitor to provide gradually increasing reference voltage. When the voltage across the capacitor ramps up to the nominal reference voltage, the pulsed current source will be switched off and the reference voltage will switch to the regular reference voltage.
From the block diagram (Figure 2), an ILIM comparator is used to realize cycle-by-cycle current limit protection. The comparator compares the LX pin voltage with the reference voltage, which is biased by a constant current. If the inductor current reaches the limit, the ILIM comparator detects the LX voltage falling below the reference voltage and releases the signal to turn off the switch Q1. The cycle-by-cycle current limit is set at 1000 mA (nom).
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NCP1526
Shutdown Mode
When the EN1 pin has a voltage applied of less than 0.4 V, the DC-DC converter block will be disabled. In shutdown mode, the internal reference, oscillator and most of the control circuitries are turned off. Therefore, the typical current consumption will be 0.2 mA (typical value). Applying a voltage above 1.2 V to EN1 pin will enable the DC-DC converter for normal operation. The device will go through soft-start to normal operation.
Thermal Shutdown
Due to the nature of the buck converter, the output L-C filter must be selected to work with internal compensation. For NCP1526, the internal compensation is internally fixed and it is optimized for an output filter of L = 2.2 mH and COUT = 4.7 mF The corner frequency is given by:
fc + 1 2p L Cout + 1 2p 2.2 mH 4.7 mF + 49.5 KHz
Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. If the junction temperature exceeds 160_C, the device shuts down. In this mode switch Q1 and Q2 and the control circuits are all turned off. The device restarts in soft-start after the temperature drops below 135C. This feature is provided to prevent catastrophic failures from accidental device overheating and it is not intended as a substitute for proper heatsinking.
Undervoltage Lockout
The device operates with inductance value between 1 mH and maximum of 4.7 mH. If the corner frequency is moved, it is recommended to check the loop stability depending of the output ripple voltage accepted and output current required. For lower frequency, the stability will be increase; a larger output capacitor value could be chosen without critical effect on the system. On the other hand, a smaller capacitor value increases the corner frequency and it should be critical for the system stability. Take care to check the loop stability. The phase margin is usually higher than 45.
Table 2. L-C Filter Example
Inductance (L) 1 mH 2.2 mH 4.7 mH Output Capacitor (Cout) 10 mF 4.7 mF 2.2 mF
The input voltage VIN1 must reach 2.5 V (typ) before the NCP1526 enables the DC-DC converter output to begin the startup sequence (see soft-start section). The UVLO threshold hysteresis is typically 100 mV. APPLICATION INFORMATIONS
Input Capacitor Selection
Inductor selection
In PWM operating mode, the input current is pulsating with large switching noise. Using an input bypass capacitor can reduce the peak current transients drawn from the input supply source, thereby reducing switching noise significantly. The capacitance needed for the input bypass capacitor depends on the source impedance of the input supply. The maximum RMS current occurs at 50% duty cycle with maximum output current, which is IO, max/2. For NCP1526, a low profile ceramic capacitor of 4.7 mF should be used for most of the cases. For effective bypass results, the input capacitor should be placed as close as possible to the VIN Pin.
Table 1. List of Input Capacitors
Murata Taiyo Yuden TDK GRM188R60J475KE GRM21BR71C475KA JMK212BY475MG C2012X5ROJ475KB C1632X5ROJ475KT
The inductor parameters directly related to device performances are saturation current and DC resistance and inductance value. The inductor ripple current (DIL) decreases with higher inductance:
Vout V DIL + 1 * out L fsw Vin
DIL peak to peak inductor ripple current L inductor value fsw Switching frequency The Saturation current of the inductor should be rated higher than the maximum load current plus half the ripple current:
DI IL(MAX) + IO(MAX) ) L 2
IL(MAX) Maximum inductor current IO(MAX) Maximum Output current The inductor's resistance will factor into the overall efficiency of the converter. For best performances, the DC resistance should be less than 0.3 W for good efficiency.
Output L-C filter Design Considerations:
The NCP1526 is built in 3 MHz frequency and uses voltage mode architecture. The correct selection of the output filter ensures good stability and fast transient response.
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NCP1526
Table 3. List of Inductors
FDK TDK Taiyo Yuden Coil craft MIPW3226 series VLF3010AT series LQ CBL2012 DO1605-T series LPO3008
LDO Operation
Voltage Regulator V1
Output capacitor selection
Selecting the proper output capacitor is based on the desired output ripple voltage. Ceramic capacitors with low ESR values will have the lowest output ripple voltage and are strongly recommended. The output capacitor requires either an X7R or X5R dielectric. The output ripple voltage in PWM mode is given by:
DVout + DIL 4 1 fsw Cout ) ESR
Table 4. List of Output Capacitors
Murata GRM188R60J475KE GRM21BR71C475KA GRM188R60OJ106ME Taiyo Yuden JMK212BY475MG JMK212BJ106MG TDK C2012X5ROJ475KB C1632X5ROJ475KT C2012X5ROJ106K 10 mF 10 mF 4.7 mF 10 mF 4.7 mF 4.7 mF
V1 is a 2.80 V, 3% low drop voltage regulator dedicated to RF sensitive module. It can deliver up to 150 mA and is totally protected against short to ground (current limitation) and overtemperature (thermal shutdown circuit with hysteresis). The PSRR of the reference is in excess of 67 dB at 1.0 kHz. The output of the V1 requires a 1.0 mF capacitor for stability. An additional 100 nF capacitor is necessary on the BYPASS pin for a low output noise. If the BYPASS pin is supporting an additional load, the stability and performance of the V1 will be diminished. Since the input voltage can go as low as 3.0 V, the reference output will be affected and can drop as low as 150 mV below the input voltage at 150 mA output current. During this low dropout, the PSRR of the reference is reduced. V1 is active when logic high is applied to the EN2 pin. It is turned off by a logic low on the EN2 pin.
Reference Bypass Capacitor Node (Bypass)
An optional 100 nF BYPASS capacitor creates a low pass filter for LDO noise reduction. The output voltage noise is 45 mVRMS with CBYPASS = 0.1 mF and COUT = 1.0 mF. If the BYPASS pin is supporting an additional load, the stability and performance of the NCP1526 will be diminished.
Current Limiting
The output voltage regulator limits the output current to ISC = 300 mA (typ). If the LDO output current exceeds ISC, the output voltage drops.
Shutdown Mode
OUTPUT VOLTAGE OPTIONS AVAILABLE UPON REQUEST
DC/DC Converter 0.9 1.0 1.1 1.2 1.3 1.4 1.5 Fixed Output Voltage (V) 1.6 1.7 1.8 1.9 2.5 2.7 3.0 3.3
When the EN2 pin has a voltage applied of less than 0.4 V, the output voltage regulator will be disabled. In shutdown mode, the internal reference and most of the control circuitries are turned off. Therefore, the typical current consumption will be 0.2 mA (typical value). Applying a voltage above 1.2 V to EN2 pin will enable the LDO for normal operation.
OUTPUT VOLTAGE OPTIONS AVAILABLE UPON REQUEST
LDO 2.5 2.6 2.7 Fixed Output Voltage (V) 2.8 2.85 3.0 3.1 3.3
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NCP1526
APPLICATION BOARD
PCB Layout Recommendations
Good PCB layout plays an important role in switching mode power conversion. Careful PCB layout can help to minimize ground bounce, EMI noise and unwanted feedback that can affect the performance of the converter. Hints suggested below can be used as a guideline in most situations. 1. Use star-ground connection to connect the IC ground nodes and capacitor GND nodes together at one point. Keep them as close as possible, and then connect this to the ground plane through several vias. This will reduce noise in the ground plane by preventing the switching currents from flowing through the ground plane.
2. Place the power components (i.e., input capacitor, inductor and output capacitor) as close together as possible for best performance. All connecting traces must be short, direct, and wide to reduce voltage errors caused by resistive losses through the traces. 3. Separate the feedback path of the output voltage from the power path. Keep this path close to the NCP1526 circuit. And also route it away from noisy components. This will prevent noise from coupling into the voltage feedback trace. The following shows the NCP1526 demo board schematic and layout and bill of materials:
Vbattery
1 OFF OFF ON ON BUCK LDO
FB
VIN1 10 LX GND1 VIN2 V1 9 8 7 6 Vout LDO
C1 L1 Vout BUCK C3
2 EN1 3 4 5 EN2 GND2 BYPASS
C2 C5
C4
Figure 25. NCP1526 Board Schematic
Figure 26. NCP1526 Board Layout
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NCP1526
J5 HEADER 2
21 EN1 T POINT A J9 en2 Vin 1 2 3 J10 Vin 0 4.7 m C1 1 en1 2 en2 3 4 bp 5 U1 NCP1526 10 FB VIN1 L1 2.2 mH lx 9 EN1 LX 8 EN2 GND1 7 GND2 VIN2 Vout 2 BYPASS V1 6 11 EP C4 C3 C2 1m 4.7 m 100 n HEADER 2 1 2 0 J7 2 J8 1
BNC H 0 EN2 T POINT A J12 en2 0 Vin
CON3
Vout 1 HEADER 2 C5 4.7 m 0 0 1 2
1 2 3
J13
J6
BNC H 0 0
CON3
0
JUMPER1 J11 2 1 0
JUMPER1
Figure 27. Schematics
0
Figure 28. Board Layout (Top View)
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NCP1526
Figure 29. Board Layout (Bottom View)
Bill of Materials
Item 1 2 3 4 6 7 8 9 Part Description NCP1526 4.7 mF ceramic capacitor 6.3 V X5R 1 mF ceramic capacitor 6.3 V X5R 100 nF ceramic capacitor 10 V X7R SMD Inductor I/O connector, it can be plugged by BLZ5.08/2 (Weidmuller reference) Jumper Header vertical mount 3*1, 2.54 mm Jumper connector, 400 mils Ref U1 C1, C4, C5 C3 C2 L1 J5, J6, J7 J10, J13 J8, J11 PCB Footprint UDFN 0805 0805 0805 1605 - - - Manufacturer ON Semiconductor Murata Murata Murata Coilcraft Weidmuller Tyco electronics/AMP Harwin Manufacturer Reference NCP1526 GRM21 series GRM21 series GRM19 series DO1605 series SL5.08/2/90B 5-826629-0 D3082-B01
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NCP1526
PACKAGE DIMENSIONS
10 PIN UDFN CASE 506AT-01 ISSUE O
D A B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D D2 E E2 e K L MIN 0.45 0.00 0.18 2.40 1.70 0.30 MILLIMETERS NOM MAX 0.50 0.55 0.03 0.05 0.127 REF 0.25 0.30 3.00 BSC 2.50 2.60 3.00 BSC 1.80 1.90 0.50 BSC 0.19 TYP 0.40 0.50
PIN ONE REFERENCE
2X
0.15 C
2X
0.15 C
0.10 C
10X
0.08 C
10X
L
10X
K
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
III III III
A3 A1 D2
1 5
E
A C
SEATING PLANE
SOLDERING FOOTPRINT*
2.6016
e
8X
2.1746 E2
1.8508
3.3048
10
6
10X
b
10X
0.5651 B
0.10 C A 0.05 C
0.3008
10X
0.5000 PITCH
DIMENSIONS: MILLIMETERS
NOTE 3
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
16
NCP1526/D

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